S-100 became IEEE 696.1
The S-100 bus emerged as a de facto standard from the Altair bus, and was later cleaned up and redefined for 24 bit addressing as IEE 6961.. A number of cards complying with this standard are shown here, significantly the DigiComp Pascal-100 MicroEngine/z80 pair and the VersaFloppy II
DigiComp Research dual S100/IEE-696.1 processor system for S-100 using a Cp/M Z80 boot stage to the Pascal MicroEngine chipset on the second board as shown.The 325k+ of addressable memory was held later in the S-100 bus, and only the first 128k was used directly by the UCSD Pascal III operating system: the remainder was used (in my own s-100 system) as a Ram Disk into which the p-system could be transferred and then be run from directly. The DigiComp BIOS was interrupt driven and managed all the other S100 devices in the bus (9511 floating point processors,an Abacus RT11 cpu, with 64k of dedicated memory running RT11/v5, floppy disc controller (Ithaca Intersystems FDC-2) and serial and parallel I/O and 325k of memory all built by DigiComp Research themselves in this case) and permitted parallel processing signals via the built in semaphores in the MicroEngine chipset to be exploited.
Pictures of the Ithaca InterSystems box used for the DigiComp system, and still in use, will be added soon
Two popular floppy disc controller cards for S-100 bus. The VersaFloppy II and the Ithaca InterSystems FDC-2, as used in the DigIComp Pascal MicroEngine S-100 complete systems, one of which i own
The QT+ S-100 memory card was a popluar choice. This is a card and the manual as held by myself
S-100 system did not always have serial serials, some had high speed video cards driving display tubes, such as the VIO-X card shown. Hard discs very soon became available and the DTC S-100 hard disc controller card and manual are show as typical examples from my collection.
Updated on 28 July 2015